A component structure with a semiconductor junction, that is to say a pn junction, is used not only for bipolar components, such as diodes, bipolar transistors and IGBTs but also for unipolar components, such as MOSFETs. The behaviors of these components admittedly differ in the switched-on state and in the switched-off state, but these components have the common feature that a space-charge zone spreads out, starting from the reverse-biased semiconductor junction, as the blocking increases.
In the case of vertical components, this pn junction runs essentially parallel to one of the faces of the semiconductor body. Without additional measures, the withstand voltage in components such as these is reduced in those areas which are adjacent to the pn junction in the lateral direction. Normally, this is the edge area of the semiconductor body, that is to say the area which is arranged adjacent to an edge which runs in the vertical direction between a front face and a rear face of the semiconductor body. The area with the pn junction normally forms the inner area, whose area is larger than that of the edge area.
Widely differing edge terminations are known in order to increase the withstand voltage in the edge area and thus to achieve a voltage breakdown in the relatively large-area inner area by making a maximum reverse voltage. In the case of edge terminations such as these, which are described in detail in Baliga: “Power Semiconductor Devices”, PWS Publishing, 1995, pages 81 to 110, a distinction is drawn between planar edge terminations and inclined edge terminations. Planar edge terminations comprise, for example, so-called doped field wings around the inner zone or field plates above the faces of the semiconductor body. Inclined edge terminations are formed by inclines on the edge. Planar and inclined terminations can be combined.
The object of edge terminations is to reduce the curvature of the profile of the field lines in the edge area and to reduce the field strengths which occur in the edge area, in comparison to the field strengths which occur in the inner area, when a reverse voltage is applied. Particularly planar edge terminations, which have the advantage over inclined terminations that they can be produced by means of conventional doping and cutting steps, are highly space-consuming, however. This means that they require a broad edge zone between the edge and the inner zone which is used for active component areas. As a result, a considerable proportion of the chip area is not available for active component areas.
WO 00/38242 A1 describes an edge termination which is arranged adjacent to a pn junction in a semiconductor body and has a trench which is filled with a dielectric and extends in the vertical direction into a semiconductor body, starting from a front face. In this case, the semiconductor body has basic doping of a first conductance type, and has an area of a second conduction type in the area of the front face, in order to form the pn junction. Starting from this area of the second conductance type, a more lightly doped area of the second conductance type extends in the lateral direction as far as the trench. This more lightly doped area optionally completely surrounds the trench.
DE 103 12 911 A1 describes a semiconductor component having an edge termination which is arranged adjacent to a pn junction in a semiconductor body. The pn junction is in this case filled between a first area, which has basic doping of a first conductance type, and a second area, which has doping of the second conductance type. The edge termination has at least one trench which extends into the semiconductor body starting from a front face and is filled with a dielectric. At least one third semiconductor zone of the second conductance type is provided adjacent to the trench, which is arranged in the first area.
Above the edge structure in the case of components such as these, a dielectric layer is normally applied to the face of the semiconductor body, starting from which the trench extends into the semiconductor body. This dielectric layer is used for passivation of the component. Ionization of atoms can occur during operation of the component, particularly in the area of the surface of this passivation layer. This has the disadvantage that the positively or negatively charged ions which result from it can influence the profile of the electrical field in the area of the edge structure located underneath it, and thus the withstand voltage of the component.
There is a need therefore, for a semiconductor component (and corresponding method of manufacture) with an edge structure which does not have the disadvantages mentioned above